many eda additions

analysis/spice_runs/regulator-feedback_U8_R15_R16.cir

@@ -0,0 +1,20 @@
+* Auto-generated testbench for regulator feedback: U8
+* Divider: R15/R16, ratio=0.1803
+* Expected Vout=3.327V, Vfb=0.6000V (Vref=0.6V)
+* Topology: standard
+* Model: ideal passives (exact for DC divider)
+
+VIN out_rail 0 DC 3.327
+R15 out_rail fb_net 10k
+R16 fb_net 0 2.2k
+
+.control
+op 
+let vfb_sim = v(fb_net)
+let expected = 0.599951256
+let error_pct = abs(vfb_sim - expected) / expected * 100
+echo "vfb_sim=$&vfb_sim error_pct=$&error_pct expected=0.599951256 vin=3.327 vref=0.6" > analysis/spice_runs/regulator-feedback_U8_R15_R16.out
+quit
+.endc
+
+.end