many eda additions

2026-06-29 16:31:02 -04:00
parent 818f965896
commit 6082613e88
41 changed files with 58827 additions and 1 deletions
--- a/analysis/spice_runs/inrush_idx1.cir
+++ b/analysis/spice_runs/inrush_idx1.cir
@@ -0,0 +1,27 @@
+* Auto-generated testbench for inrush analysis: U8 (switching)
+* Output: 3.327V, 40.1µF total capacitance
+* Soft-start: 1.0ms ramp
+
+* Voltage source with linear ramp (soft-start) — 10us delay before ramp
+Vreg ramp 0 PWL(0 0 10u 0 1.01m 3.327)
+* Regulator output impedance
+Rout ramp out 10m
+
+* Output capacitors
+C16 out 0 10u
+C19 out 0 100n
+C14 out 0 10u
+C15 out 0 10u
+C17 out 0 10u
+
+.control
+tran 2u 3m
+let i_out = abs(i(Rout))
+let i_peak = vecmax(i_out)
+let t_peak = i_out[vecmin(abs(i_out - i_peak))]
+meas tran v_settled find v(out) at=2.7m
+echo "i_peak=$&i_peak t_peak=$&t_peak v_settled=$&v_settled v_target=3.327 r_out=0.01" > analysis/spice_runs/inrush_idx1.out
+quit
+.endc
+
+.end