many eda additions

2026-06-29 16:31:02 -04:00
parent 818f965896
commit 6082613e88
41 changed files with 58827 additions and 1 deletions
--- a/analysis/spice_runs/inrush_idx0.cir
+++ b/analysis/spice_runs/inrush_idx0.cir
@@ -0,0 +1,25 @@
+* Auto-generated testbench for inrush analysis: U6 (LDO)
+* Output: 5.0V, 120.0µF total capacitance
+* Soft-start: 0.5ms ramp
+
+* Voltage source with linear ramp (soft-start) — 10us delay before ramp
+Vreg ramp 0 PWL(0 0 10u 0 510u 5.0)
+* Regulator output impedance
+Rout ramp out 100m
+
+* Output capacitors
+C7 out 0 10u
+C3 out 0 100u
+C8 out 0 10u
+
+.control
+tran 1u 1.5m
+let i_out = abs(i(Rout))
+let i_peak = vecmax(i_out)
+let t_peak = i_out[vecmin(abs(i_out - i_peak))]
+meas tran v_settled find v(out) at=1.35m
+echo "i_peak=$&i_peak t_peak=$&t_peak v_settled=$&v_settled v_target=5.0 r_out=0.1" > analysis/spice_runs/inrush_idx0.out
+quit
+.endc
+
+.end