Strip PCIe-M2 (M-key/NVMe) sheet; re-baseline stripped carrier
Drops the unused M.2 M-key/NVMe block — design is 1x M.2 E-key (Wi-Fi) only, since the CM5 exposes a single PCIe x1 lane (datasheet SC1466), reserved for the E-key. The 10 freed PCIE_* lanes are NC on Module1 unit 2, to be rewired to a fresh E-key sheet in the add phase. - CM5_HighSpeed: retire PCIE_* labels/wires, NC pins 102,104,106,109, 110,112,116,118,122,124 - root CM5IO: drop whole PCIe-M2 (sheet) block; strip dangling PCIE_* pins off the kept CM5_HighSpeed sheet symbol - delete carrier/PCIe-M2.kicad_sch; clean .kicad_pro sheets array + ERC exclusion - retire_block.py: add --drop-sheet FILE (remove whole (sheet) block + sheet_instances path) - analysis/baseline/carrier_stripped.json: new add-phase diff anchor Verify: ERC 136->133 (zero new violation types); analyzer diff +0/~0 (cumulative -41 removed vs original ref); netlist confirms +5v/+3.3v/ GND/+1.8v intact (U8's M2_3v3 was a local rail, not board +3.3v). Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
This commit is contained in:
noise
@@ -261,7 +261,6 @@
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(text "Connectors\n-------\nEthernet\nSDCARD\n40way RPI\nJumpers\nFan\nBattery"
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(exclude_from_sim no)
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(at 150.876 147.066 0)
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@@ -3521,86 +3421,6 @@
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(uuid "0f22151c-f260-4674-b486-4710a2c42a55")
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(pin "PCIE_CLK_N" output
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(pin "PCIE_TX_N" output
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(pin "PCIE_nRST" output
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||||
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(pin "PCIE_RX_P" input
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(uuid "a1823eb2-fb0d-4ed8-8b96-04184ac3a9d5")
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(pin "PCIE_RX_N" input
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(at 186.69 53.34 0)
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(uuid "29e78086-2175-405e-9ba3-c48766d2f50c")
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(pin "PCIE_nCLKREQ" input
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(pin "+3.3v" input
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@@ -3631,26 +3451,6 @@
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(sheet
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(pin "PCIE_TX_P" input
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(at 214.63 43.18 180)
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(effects
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(at 214.63 45.72 180)
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(effects
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|
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|
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(pin "PCIE_RX_P" output
|
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(at 214.63 50.8 180)
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|
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|
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)
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|
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(at 214.63 72.39 180)
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(at 214.63 76.2 180)
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(effects
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)
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)
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File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user